The essential journalist news source
AMALIA 24.2 estimated parasitics feature reduces PEX iterations by at least 30%

Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%

 April 25th 2024 – Thalia, a leader in analog, mixed signal and RF IP design migration, today announced the 24.2 release of its AMALIA platform.  The latest update brings advanced features to the AMALIA toolset including estimated parasitics for enhanced design accuracy and a faster migration process for semiconductor IP design engineers.


AMALIA 24.2's stand-out feature directly tackles one of the most intricate challenges in semiconductor design—accurate parasitic estimation. AMALIA eliminates this traditional constraint and streamlines the design process by intelligently incorporating extracted parasitics from the source design and including them in the circuit porting phase to provide estimated parasitics early in the design process. As a result, the accuracy of the ported schematic is improved, reducing the need for multiple post-layout parasitic extraction (PEX) iterations by at least 30%. This is particularly beneficial in high-frequency applications, and smaller process technology nodes, where precision and speed are paramount.


With this latest enhancement to the AMALIA platform, Thalia once again demonstrates its dedication to reducing design cycle times and associated costs, empowering businesses to achieve faster time-to-market for new product innovations. The new feature streamlines the schematic porting by removing the need for skilled designers to estimate parasitics manually, saving valuable resources and speeding up the design verification process.


Syed Ahmad, VP of Product Development at Thalia, remarked on the update, "With AMALIA 24.2, we're not just updating a platform; we're setting a new industry standard for efficiency and precision in IP migration. Estimated parasitics in AMALIA is a testament to our commitment to innovation and the tangible benefits it brings to our customers."


In addition, AMALIA 24.2 enhances the IP migration experience with a new design centering assistant feature, and updates to its advanced device mapping. The design centering assistant quickly identifies critical devices that impact performance, facilitating precise adjustments, while the device mapping table now benefits from AI/ML-driven auto device recommendations, ensuring optimal device selection and removing the need for manual work.


The launch of AMALIA 24.2 is a pivotal moment for design engineers looking to navigate the complexities of semiconductor design migration with greater ease and accuracy. Thalia remains at the forefront of this endeavor, continuously seeking ways to refine and enhance the IP design migration process to deliver tangible value to businesses trying to maximize their team resources and productivity.


For more information on how AMALIA 24.2 can facilitate your IP migration projects, saving both time and budget, visit Thalia's website:




About Thalia


Thalia is an IP migration specialist with expertise in targeted automation for analog, mixed signal and RF design and migration. Thalia’s AMALIA software platform analyzes, migrates and optimizes existing IP for new technologies and applications. IP houses, Tier 1 players and foundries can leverage the platform to reuse existing IP and diversify their product ranges quickly and cost effectively thanks to AMALIA’s AI and ML capabilities that deliver outstanding efficiencies in the analysis, design and verification stages of IP reuse. The result is a reduction in development time of at least 40%, enabling semiconductor businesses to react quickly to changing market demands and maximise business opportunities. The AMALIA platform has been validated on over 50 IPs, in domains ranging from RF and Baseband to PMIC and PLL/ADC, many of which are already in commercial use.


For more information visit


For press enquiries, please contact:

Claire Marshall:

Melanie Williams: